TY - GEN
T1 - NATURE
T2 - 43rd Annual Design Automation Conference, DAC 2006
AU - Zhang, Wei
AU - Jha, Niraj K.
AU - Shang, Li
PY - 2006
Y1 - 2006
N2 - Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet mature, making implementation of such circuits, at least on a large scale, in the near future infeasible. However, if photo-lithography could be used to implement circuits using these nanodevices, then hybrid nano/CMOS chips could be fabricated and the benefits of nanotechnology could be utilized immediately. A startup company, called Nantero, has developed and implemented a non-volatile nanotube random-access memory (NRAM) using photo-lithography that is considerably faster and denser than DRAM, has much lower power consumption than DRAM or flash, has similar speed to SRAM and is highly resistant to environmental forces (temperature, magnetism). In this paper, we propose a novel high performance reconfigurable architecture, called NATURE, that utilizes CMOS logic and NRAMs. Use of the highly-dense NRAMs allows large on-chip configuration storage, enabling fine-grain run-time reconfiguration and temporal logic folding of a circuit before being mapped to the architecture. This can significantly increase the logic density of NATURE (by over an order of magnitude for larger circuits) while remaining competitive in performance. Compared to traditional reconfigurable architectures, NATURE also allows the designer the flexibility to adjust the level of logic folding in order to improve performance or perform area-performance trade-offs. Experimental results establish its efficacy and give comparisons with today's mainstream FPGA technology which does not allow logic folding.
AB - Recent progress on nanodevices, such as carbon nanotubes and nanowires, points to promising directions for future circuit design. However, nanofabrication techniques are not yet mature, making implementation of such circuits, at least on a large scale, in the near future infeasible. However, if photo-lithography could be used to implement circuits using these nanodevices, then hybrid nano/CMOS chips could be fabricated and the benefits of nanotechnology could be utilized immediately. A startup company, called Nantero, has developed and implemented a non-volatile nanotube random-access memory (NRAM) using photo-lithography that is considerably faster and denser than DRAM, has much lower power consumption than DRAM or flash, has similar speed to SRAM and is highly resistant to environmental forces (temperature, magnetism). In this paper, we propose a novel high performance reconfigurable architecture, called NATURE, that utilizes CMOS logic and NRAMs. Use of the highly-dense NRAMs allows large on-chip configuration storage, enabling fine-grain run-time reconfiguration and temporal logic folding of a circuit before being mapped to the architecture. This can significantly increase the logic density of NATURE (by over an order of magnitude for larger circuits) while remaining competitive in performance. Compared to traditional reconfigurable architectures, NATURE also allows the designer the flexibility to adjust the level of logic folding in order to improve performance or perform area-performance trade-offs. Experimental results establish its efficacy and give comparisons with today's mainstream FPGA technology which does not allow logic folding.
KW - Logic folding
KW - NRAM
KW - Run-time reconfiguration
UR - http://www.scopus.com/inward/record.url?scp=34547222125&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34547222125&partnerID=8YFLogxK
U2 - 10.1145/1146909.1147091
DO - 10.1145/1146909.1147091
M3 - Conference contribution
AN - SCOPUS:34547222125
SN - 1595933816
SN - 1595933816
SN - 9781595933812
T3 - Proceedings - Design Automation Conference
SP - 711
EP - 716
BT - 2006 43rd ACM/IEEE Design Automation Conference, DAC'06
PB - Institute of Electrical and Electronics Engineers Inc.
Y2 - 24 July 2006 through 28 July 2006
ER -