Abstract
In this paper we address the problem of detecting multiple stuck-open faults in CMOS logic circuits. First, we show that a test set based on two-pattern tests, which are designed to detect single stuck-open faults, can be found that detects all multiple stuck-open faults inside any CMOS gate in the circuit. Then we extend the concept of two-pattern tests to three-pattern tests. We obtain three-pattern tests for every single stuck-open fault at the checkpoints. If a certain condition is satisfied, then we can show that the resulting test set can detect any multiple stuck-open fault in the circuit. Even when this condition is not fully met, a very large percentage of the multiple stuck-open faults can still be guaranteed to be detected. For the special case of fan-out-free CMOS circuits, we show that a single stuck-open fault test set based on two-pattern tests can always be found which has 100 percent multiple stuck-open fault coverage. This test set can also be guaranteed to be robust in the presence of arbitrary delays.
Original language | English (US) |
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Pages (from-to) | 426-432 |
Number of pages | 7 |
Journal | IEEE Transactions on Computers |
Volume | 37 |
Issue number | 4 |
DOIs | |
State | Published - Apr 1988 |
All Science Journal Classification (ASJC) codes
- Software
- Theoretical Computer Science
- Hardware and Architecture
- Computational Theory and Mathematics
Keywords
- Multiple fault
- robust test set
- stuck-on fault
- stuck-open fault
- three-pattern test
- two-pattern test