Multimedia instructions in ia-64

Ruby B. Lee; A. Murat Fiskiran; Abdulla Bubshait

doi:10.1109/ICME.2001.1237694

Multimedia instructions in ia-64

Ruby B. Lee, A. Murat Fiskiran, Abdulla Bubshait

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

We discuss the integer and floating-point multimedia instructions in the IA-64 instruction-set architecture (ISA). These multimedia instructions implement subword parallelism, also called packed parallelism or microSIMD parallelism. They are both a subset and a superset of the multimedia instructions from the predecessor architectures: MMX, SSE and SSE-2 from the IA-32 architecture, and MAX and MAX-2 from the PARISC architecture. We discuss the novel subword permutation instructions that are new in the IA-64, and their effectiveness, in combination with the subword arithmetic instructions, for speeding up multimedia programs. These packed arithmetic and permutation instructions can also be used in media processors and DSPs for very fast and cost-effective multimedia processing.

Original language	English (US)
Article number	1237694
Pages (from-to)	214-217
Number of pages	4
Journal	Proceedings - IEEE International Conference on Multimedia and Expo
DOIs	https://doi.org/10.1109/ICME.2001.1237694
State	Published - Jan 1 2001

All Science Journal Classification (ASJC) codes

Computer Networks and Communications
Computer Science Applications

Access to Document

10.1109/ICME.2001.1237694

Cite this

@article{791d09f3aa4d4306a9190f36699a89e0,

title = "Multimedia instructions in ia-64",

abstract = "We discuss the integer and floating-point multimedia instructions in the IA-64 instruction-set architecture (ISA). These multimedia instructions implement subword parallelism, also called packed parallelism or microSIMD parallelism. They are both a subset and a superset of the multimedia instructions from the predecessor architectures: MMX, SSE and SSE-2 from the IA-32 architecture, and MAX and MAX-2 from the PARISC architecture. We discuss the novel subword permutation instructions that are new in the IA-64, and their effectiveness, in combination with the subword arithmetic instructions, for speeding up multimedia programs. These packed arithmetic and permutation instructions can also be used in media processors and DSPs for very fast and cost-effective multimedia processing.",

author = "Lee, {Ruby B.} and Fiskiran, {A. Murat} and Abdulla Bubshait",

year = "2001",

month = jan,

day = "1",

doi = "10.1109/ICME.2001.1237694",

language = "English (US)",

pages = "214--217",

journal = "Proceedings - IEEE International Conference on Multimedia and Expo",

issn = "1945-7871",

}

TY - JOUR

T1 - Multimedia instructions in ia-64

AU - Lee, Ruby B.

AU - Fiskiran, A. Murat

AU - Bubshait, Abdulla

PY - 2001/1/1

Y1 - 2001/1/1

N2 - We discuss the integer and floating-point multimedia instructions in the IA-64 instruction-set architecture (ISA). These multimedia instructions implement subword parallelism, also called packed parallelism or microSIMD parallelism. They are both a subset and a superset of the multimedia instructions from the predecessor architectures: MMX, SSE and SSE-2 from the IA-32 architecture, and MAX and MAX-2 from the PARISC architecture. We discuss the novel subword permutation instructions that are new in the IA-64, and their effectiveness, in combination with the subword arithmetic instructions, for speeding up multimedia programs. These packed arithmetic and permutation instructions can also be used in media processors and DSPs for very fast and cost-effective multimedia processing.

AB - We discuss the integer and floating-point multimedia instructions in the IA-64 instruction-set architecture (ISA). These multimedia instructions implement subword parallelism, also called packed parallelism or microSIMD parallelism. They are both a subset and a superset of the multimedia instructions from the predecessor architectures: MMX, SSE and SSE-2 from the IA-32 architecture, and MAX and MAX-2 from the PARISC architecture. We discuss the novel subword permutation instructions that are new in the IA-64, and their effectiveness, in combination with the subword arithmetic instructions, for speeding up multimedia programs. These packed arithmetic and permutation instructions can also be used in media processors and DSPs for very fast and cost-effective multimedia processing.

UR - http://www.scopus.com/inward/record.url?scp=84908188841&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=84908188841&partnerID=8YFLogxK

U2 - 10.1109/ICME.2001.1237694

DO - 10.1109/ICME.2001.1237694

M3 - Article

AN - SCOPUS:84908188841

SN - 1945-7871

SP - 214

EP - 217

JO - Proceedings - IEEE International Conference on Multimedia and Expo

JF - Proceedings - IEEE International Conference on Multimedia and Expo

M1 - 1237694

ER -

Multimedia instructions in ia-64

Abstract

All Science Journal Classification (ASJC) codes

Access to Document

Other files and links

Fingerprint

Cite this