MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics

Ping Wang; David Giuliano; Stephen Allen; Minjie Chen

doi:10.1109/APEC43580.2023.10131617

MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics

Ping Wang, David Giuliano, Stephen Allen, Minjie Chen

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

12 Scopus citations

Abstract

This paper presents an ultra-thin microprocessor voltage regulator module (VRM) based on multistack switched-capacitor point-of-load (MSC-PoL) architecture and coupled magnetics. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into multiple intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft-charging and voltage regulation. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to miniaturize the dc magnetic energy storage, reduce the inductor current ripple, and improve the VRM transient speed. A 48 V-to-1 V, 6-mm-thick MSC-PoL VRM with ladder-structured coupled inductors is built and tested. A leakage magnetic plate of 0.8-mm thickness is designed to adjust the leakage inductance for lower current ripple. The peak efficiency, full-load efficiency and full-load power density of the MSC-PoL prototype with and without using the leakage plate are 92.9% and 91.2%, 86.3% (@220 A) and 85.1% (@210 A), and 607 W/in3 and 677 W/in3, respectively.

Original language	English (US)
Title of host publication	APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	1967-1974
Number of pages	8
ISBN (Electronic)	9781665475396
DOIs	https://doi.org/10.1109/APEC43580.2023.10131617
State	Published - 2023
Event	38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023 - Orlando, United States Duration: Mar 19 2023 → Mar 23 2023

Publication series

Name	Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC
Volume	2023-March

Conference

Conference	38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023
Country/Territory	United States
City	Orlando
Period	3/19/23 → 3/23/23

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Keywords

Switched capacitor circuit
coupled inductor
point-of-load
power-on-package
voltage regulation module

Access to Document

10.1109/APEC43580.2023.10131617

Cite this

Wang, P., Giuliano, D., Allen, S., & Chen, M. (2023). MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics. In APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition (pp. 1967-1974). (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2023-March). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/APEC43580.2023.10131617

Wang, Ping ; Giuliano, David ; Allen, Stephen et al. / MSC-PoL : An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics. APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2023. pp. 1967-1974 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC).

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title = "MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics",

abstract = "This paper presents an ultra-thin microprocessor voltage regulator module (VRM) based on multistack switched-capacitor point-of-load (MSC-PoL) architecture and coupled magnetics. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into multiple intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft-charging and voltage regulation. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to miniaturize the dc magnetic energy storage, reduce the inductor current ripple, and improve the VRM transient speed. A 48 V-to-1 V, 6-mm-thick MSC-PoL VRM with ladder-structured coupled inductors is built and tested. A leakage magnetic plate of 0.8-mm thickness is designed to adjust the leakage inductance for lower current ripple. The peak efficiency, full-load efficiency and full-load power density of the MSC-PoL prototype with and without using the leakage plate are 92.9% and 91.2%, 86.3% (@220 A) and 85.1% (@210 A), and 607 W/in3 and 677 W/in3, respectively.",

keywords = "Switched capacitor circuit, coupled inductor, point-of-load, power-on-package, voltage regulation module",

author = "Ping Wang and David Giuliano and Stephen Allen and Minjie Chen",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023 ; Conference date: 19-03-2023 Through 23-03-2023",

year = "2023",

doi = "10.1109/APEC43580.2023.10131617",

language = "English (US)",

series = "Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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Wang, P, Giuliano, D, Allen, S & Chen, M 2023, MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics. in APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC, vol. 2023-March, Institute of Electrical and Electronics Engineers Inc., pp. 1967-1974, 38th Annual IEEE Applied Power Electronics Conference and Exposition, APEC 2023, Orlando, United States, 3/19/23. https://doi.org/10.1109/APEC43580.2023.10131617

MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics. / Wang, Ping; Giuliano, David; Allen, Stephen et al.
APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc., 2023. p. 1967-1974 (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC; Vol. 2023-March).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

TY - GEN

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AU - Wang, Ping

AU - Giuliano, David

AU - Allen, Stephen

AU - Chen, Minjie

PY - 2023

Y1 - 2023

N2 - This paper presents an ultra-thin microprocessor voltage regulator module (VRM) based on multistack switched-capacitor point-of-load (MSC-PoL) architecture and coupled magnetics. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into multiple intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft-charging and voltage regulation. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to miniaturize the dc magnetic energy storage, reduce the inductor current ripple, and improve the VRM transient speed. A 48 V-to-1 V, 6-mm-thick MSC-PoL VRM with ladder-structured coupled inductors is built and tested. A leakage magnetic plate of 0.8-mm thickness is designed to adjust the leakage inductance for lower current ripple. The peak efficiency, full-load efficiency and full-load power density of the MSC-PoL prototype with and without using the leakage plate are 92.9% and 91.2%, 86.3% (@220 A) and 85.1% (@210 A), and 607 W/in3 and 677 W/in3, respectively.

AB - This paper presents an ultra-thin microprocessor voltage regulator module (VRM) based on multistack switched-capacitor point-of-load (MSC-PoL) architecture and coupled magnetics. In the MSC-PoL architecture, the stacked switched-capacitor cells split the high input voltage into multiple intermediate voltage rails, which are loaded with the switched-inductor cells to achieve soft-charging and voltage regulation. Many inductors of the switched-inductor cells are coupled into one and operated in interleaving to miniaturize the dc magnetic energy storage, reduce the inductor current ripple, and improve the VRM transient speed. A 48 V-to-1 V, 6-mm-thick MSC-PoL VRM with ladder-structured coupled inductors is built and tested. A leakage magnetic plate of 0.8-mm thickness is designed to adjust the leakage inductance for lower current ripple. The peak efficiency, full-load efficiency and full-load power density of the MSC-PoL prototype with and without using the leakage plate are 92.9% and 91.2%, 86.3% (@220 A) and 85.1% (@210 A), and 607 W/in3 and 677 W/in3, respectively.

KW - Switched capacitor circuit

KW - coupled inductor

KW - point-of-load

KW - power-on-package

KW - voltage regulation module

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DO - 10.1109/APEC43580.2023.10131617

M3 - Conference contribution

AN - SCOPUS:85162217647

T3 - Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC

SP - 1967

EP - 1974

BT - APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition

PB - Institute of Electrical and Electronics Engineers Inc.

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ER -

Wang P, Giuliano D, Allen S, Chen M. MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics. In APEC 2023 - 38th Annual IEEE Applied Power Electronics Conference and Exposition. Institute of Electrical and Electronics Engineers Inc. 2023. p. 1967-1974. (Conference Proceedings - IEEE Applied Power Electronics Conference and Exposition - APEC). doi: 10.1109/APEC43580.2023.10131617

MSC-PoL: An Ultra-Thin 220-A/48-to-1-V Hybrid GaN-Si CPU VRM with Multistack Switched Capacitor Architecture and Coupled Magnetics

Abstract

Publication series

Conference

All Science Journal Classification (ASJC) codes

Keywords

Access to Document

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