LIMITED REACTION PROCESSING: IN-SITU METAL-OXIDE-SEMICONDUCTOR CAPACITORS.

J. C. Sturm; C. M. Gronet; J. F. Gibbons

doi:10.1109/edl.1986.26374

LIMITED REACTION PROCESSING: IN-SITU METAL-OXIDE-SEMICONDUCTOR CAPACITORS.

J. C. Sturm, C. M. Gronet, J. F. Gibbons

Research output: Contribution to journal › Article › peer-review

9 Scopus citations

Abstract

Limited reaction processing has been used to fabricate in-situ silicon-silicon dioxide-polycrystalline silicon layers for metal-oxide-semiconductor (MOS) capacitors. The process consists of multiple in-situ rapid thermal processing steps to grow or deposit different layers. Capacitors have been fabricated from these layers and analyzed by capacitance-voltage measurements for interfacial fixed charge and interface state density. The capacitors exhibit excellent characteristics.

Original language	English (US)
Pages (from-to)	282-284
Number of pages	3
Journal	Electron device letters
Volume	EDL-7
Issue number	5
DOIs	https://doi.org/10.1109/edl.1986.26374
State	Published - 1986
Externally published	Yes

All Science Journal Classification (ASJC) codes

General Engineering

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10.1109/edl.1986.26374

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title = "LIMITED REACTION PROCESSING: IN-SITU METAL-OXIDE-SEMICONDUCTOR CAPACITORS.",

abstract = "Limited reaction processing has been used to fabricate in-situ silicon-silicon dioxide-polycrystalline silicon layers for metal-oxide-semiconductor (MOS) capacitors. The process consists of multiple in-situ rapid thermal processing steps to grow or deposit different layers. Capacitors have been fabricated from these layers and analyzed by capacitance-voltage measurements for interfacial fixed charge and interface state density. The capacitors exhibit excellent characteristics.",

author = "Sturm, {J. C.} and Gronet, {C. M.} and Gibbons, {J. F.}",

year = "1986",

doi = "10.1109/edl.1986.26374",

language = "English (US)",

volume = "EDL-7",

pages = "282--284",

journal = "Electron device letters",

issn = "0193-8576",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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T2 - IN-SITU METAL-OXIDE-SEMICONDUCTOR CAPACITORS.

AU - Sturm, J. C.

AU - Gronet, C. M.

AU - Gibbons, J. F.

PY - 1986

Y1 - 1986

N2 - Limited reaction processing has been used to fabricate in-situ silicon-silicon dioxide-polycrystalline silicon layers for metal-oxide-semiconductor (MOS) capacitors. The process consists of multiple in-situ rapid thermal processing steps to grow or deposit different layers. Capacitors have been fabricated from these layers and analyzed by capacitance-voltage measurements for interfacial fixed charge and interface state density. The capacitors exhibit excellent characteristics.

AB - Limited reaction processing has been used to fabricate in-situ silicon-silicon dioxide-polycrystalline silicon layers for metal-oxide-semiconductor (MOS) capacitors. The process consists of multiple in-situ rapid thermal processing steps to grow or deposit different layers. Capacitors have been fabricated from these layers and analyzed by capacitance-voltage measurements for interfacial fixed charge and interface state density. The capacitors exhibit excellent characteristics.

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DO - 10.1109/edl.1986.26374

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JO - Electron device letters

JF - Electron device letters

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ER -

LIMITED REACTION PROCESSING: IN-SITU METAL-OXIDE-SEMICONDUCTOR CAPACITORS.

Abstract

All Science Journal Classification (ASJC) codes

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