The leakage current of an arbitrary number of series-connected polysilicon Thin Film Transistors (TFT's) with a common gate is shown to be easily computed from the I-V characteristics of a single FET for the first time, both by an analytical model and by graphical techniques. Good agreement with experimental data is obtained for drain biases greater than ~1 V. The work is also applicable to single crystal Silicon-On-Insulator (SOI) TFT's.
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering