Is redundancy necessary to reduce delay?

Kurt Keutzer, Sharad Malik, Alexander Saldanha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations


Logic optimization procedures principally attempt to optimize three criteria: performance, area, and testability. The relationship between area optimization and testability has recently been explored. As to the relationship between performance and testability, experience has shown that performance optimizations can, and do in practice, introduce single stuck-at-fault redundancies into designs. Are these redundancies necessary to increase performance or are they only an unnecessary by-product of performance optimization? The authors give a constructive resolution of this question in the form of an algorithm that takes as input a combinational circuit and returns an irredundant circuit that is as fast. They demonstrate the utility of this algorithm on a well-known circuit, the carry-skip adder, and present a novel irredundant design of that adder. As this algorithm may either increase or decrease circuit area, the authors leave unresolved the question as to whether every circuit has an irredundant circuit that is at least as fast and is of equal or lesser area.

Original languageEnglish (US)
Title of host publication27th ACM/IEEE Design Automation Conference. Proceedings 1990
PublisherPubl by IEEE
Number of pages7
ISBN (Print)081869650X
StatePublished - 1990
Externally publishedYes
Event27th ACM/IEEE Design Automation Conference - Orlando, FL, USA
Duration: Jun 24 1990Jun 28 1990

Publication series

Name27th ACM/IEEE Design Automation Conference. Proceedings 1990


Other27th ACM/IEEE Design Automation Conference
CityOrlando, FL, USA

All Science Journal Classification (ASJC) codes

  • General Engineering


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