Inter-core cooperative TLB prefetchers for chip multiprocessors

Abhishek Bhattacharjee, Margaret Rose Martonosi

Research output: Chapter in Book/Report/Conference proceedingConference contribution

56 Scopus citations

Abstract

Translation Lookaside Buffers (TLBs) are commonly employed in modern processor designs and have considerable impact on overall system performance. A number of past works have studied TLB designs to lower access times and miss rates, specifically for uniprocessors. With the growing dominance of chip multiprocessors (CMPs), it is necessary to examine TLB performance in the context of parallel workloads. This work is the first to present TLB prefetchers that exploit commonality in TLB miss patterns across cores in CMPs. We propose and evaluate two Inter-Core Cooperative (ICC) TLB prefetching mechanisms, assessing their effectiveness at eliminating TLB misses both individually and together. Our results show these approaches require at most modest hardware and can collectively eliminate 19% to 90% of data TLB (D-TLB) misses across the surveyed parallel workloads. We also compare performance improvements across a range of hardware and software implementation possibilities. We find that while a fully-hardware implementation results in average performance improvements of 8-46% for a range of TLB sizes, a hardware/software approach yields improvements of 4-32%. Overall, our work shows that TLB prefetchers exploiting inter-core correlations can effectively eliminate TLB misses.

Original languageEnglish (US)
Title of host publicationASPLOS XV - 15th International Conference on Architectural Support for Programming Languages and Operating Systems
Pages359-370
Number of pages12
DOIs
StatePublished - 2010
Event15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XV - Pittsburgh, PA, United States
Duration: Mar 13 2010Mar 17 2010

Publication series

NameInternational Conference on Architectural Support for Programming Languages and Operating Systems - ASPLOS

Other

Other15th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XV
CountryUnited States
CityPittsburgh, PA
Period3/13/103/17/10

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

Keywords

  • Parallelism
  • Prefetching
  • Translation lookaside buffer

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