## Abstract

A systolic architecture for two basic mathematical morphology operations is presented. Mathematical morphology has been proven to be a very useful tool for applications such as image restoration, image skeletonization, pattern recognition, machine vision, etc. The advantages of the design stem from the fact that it has a pipeline period α = 1, requires simple communications, and exploits the simplicity of the morphological operations to make it possible to implement them in a linear target machine without using multiprojection, although the starting algorithm is a generalized two-dimensional convolution. The optimal partitioning strategy for a constrained mapping when the number of PEs is fixed is given, achieving 100% processor utilization, and a systolic chip design which is capable of real-time video performance is proposed as the basic processing element.

Original language | English (US) |
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Pages (from-to) | 1442-1445 |

Number of pages | 4 |

Journal | Proceedings - IEEE International Symposium on Circuits and Systems |

Volume | 2 |

State | Published - 1990 |

Event | 1990 IEEE International Symposium on Circuits and Systems Part 3 (of 4) - New Orleans, LA, USA Duration: May 1 1990 → May 3 1990 |

## All Science Journal Classification (ASJC) codes

- Electrical and Electronic Engineering