Instruction level power analysis and optimization of software

Vivek Tiwari, Sharad Malik, Andrew Wolfe, Mike Tien Chien Lee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

76 Scopus citations

Abstract

Software constitutes a major component of today's systems, and its role is projected to continue to grow. This motivates the need for analyzing power consumption from the point of view of software - something that circuit and gate level power analysis tools are inadequate for. This paper describes an alternative, measurement based instruction level power analysis approach that provides an accurate and practical way of quantifying this cost. This technique has been applied to three commercial, architecturally different microprocessors. This paper presents an overview of the salient results of these analyses. The ability to evaluate software in terms of power consumption makes it feasible to develop tools and techniques for low power software. Several ideas in this regard as suggested by the power analysis of the subject microprocessors are also summarized.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE International Conference on VLSI Design
Pages326-328
Number of pages3
StatePublished - Jan 1 1996
EventProceedings of the 1996 9th International Conference on VLSI Design - Bangalore, India
Duration: Jan 3 1996Jan 6 1996

Other

OtherProceedings of the 1996 9th International Conference on VLSI Design
CityBangalore, India
Period1/3/961/6/96

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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    Tiwari, V., Malik, S., Wolfe, A., & Lee, M. T. C. (1996). Instruction level power analysis and optimization of software. In Proceedings of the IEEE International Conference on VLSI Design (pp. 326-328)