Implications of hierarchical N-body methods for multiprocessor architecture

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Summary form only given. The key architectural implications of realistically scaling a representative member of this important class of applications is examined. Using scaling methods that reflect the concerns of an application scientist leads to different conclusions than does naive scaling in terms of data set size. In particular, it is shown that under the most realistic scaling model, both the communication to computation ratio and the amount of cache memory per processor required for effective performance increase with scaling. The effect of a shared address space versus message passing as the communication abstraction is also examined. It is shown that the lack of a shared address space substantially increases the programming complexity and performance overheads of a message-passing implementation.

Original languageEnglish (US)
Title of host publicationConference Proceedings - Annual Symposium on Computer Architecture
PublisherPubl by IEEE
Pages436
Number of pages1
ISBN (Print)0897915097, 9780897915090
DOIs
StatePublished - 1992
Event19th International Symposium on Computer Architecture - Gold Coast, Aust
Duration: May 19 1992May 21 1992

Publication series

NameConference Proceedings - Annual Symposium on Computer Architecture

Other

Other19th International Symposium on Computer Architecture
CityGold Coast, Aust
Period5/19/925/21/92

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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  • Cite this

    Singh, J. P. (1992). Implications of hierarchical N-body methods for multiprocessor architecture. In Conference Proceedings - Annual Symposium on Computer Architecture (pp. 436). (Conference Proceedings - Annual Symposium on Computer Architecture). Publ by IEEE. https://doi.org/10.1145/146628.140653