Implementing Branch-Predictor Decay Using Quasi-Static Memory Cells

Philo Juang, Margaret Rose Martonosi, Douglas W. Clark, Kevin Skadron, Zhigang Hu, Philip W. Diodato, Stefanos Kaxiras

Research output: Contribution to journalArticlepeer-review

12 Scopus citations

Abstract

With semiconductor technology advancing toward deep submicron, leakage energy is of increasing concern, especially for large on-chip array structures such as caches and branch predictors. Recent work has suggested that larger, aggressive branch predictors can and should be used in order to improve microprocessor performance. A further consideration is that more aggressive branch predictors, especially multiported predictors for multiple branch prediction, may be thermal hot spots, thus further increasing leakage. Moreover, as the branch predictor holds state that is transient and predictive, elements can be discarded without adverse effect. For these reasons, it is natural to consider applying decay techniques—already shown to reduce leakage energy for caches—to branch-prediction structures. Due to the structural difference between caches and branch predictors, applying decay techniques to branch predictors is not straightforward. This paper explores the strategies for exploiting spatial and temporal locality to make decay effective for bimodal, gshare, and hybrid predictors, as well as the branch target buffer (BTB). Furthermore, the predictive behavior of branch predictors steers them towards decay based not on state-preserving, static storage cells, but rather quasi-static, dynamic storage cells. This paper will examine the results of implementing.

Original languageEnglish (US)
Pages (from-to)180-219
Number of pages40
JournalACM Transactions on Architecture and Code Optimization
Volume1
Issue number2
DOIs
StatePublished - Jan 1 2004

All Science Journal Classification (ASJC) codes

  • Software
  • Information Systems
  • Hardware and Architecture

Keywords

  • Design
  • Energy aware computing
  • Performance

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