@inproceedings{b399a90b2f2042369d5f9dba06e0b23e,
title = "HyperTRIO: Hyper-Tenant Translation of I/O Addresses",
abstract = "Hardware resource sharing has proven to be an efficient way to increase resource utilization, save energy, and decrease operational cost. Modern-day servers accommodate hundreds of Virtual Machines (VMs) running concurrently, and lightweight software abstractions like containers enable the consolidation of an even larger number of independent tenants per server. The increasing number of hardware accelerators along with growing interconnection bandwidth creates a new class of devices available for sharing. To fully utilize the potential of these devices, I/O architecture needs to be carefully designed for both processors and devices. This paper presents the design and analysis of scalable Hypertenant TRanslation of I/O addresses (HyperTRIO) for shared devices. HyperTRIO provides isolation and performance guarantees at low hardware cost by supporting multiple in-flight address translations, partitioning translation caches, and utilizing both inter- and intra-tenant access patterns for translation prefetching. This work also constructs a Hyper-tenant Simulator of I/O address accesses (HyperSIO) for 1000-tenant systems which we open-sourced. This work characterizes tenant access patterns and uses these insights to address identified challenges. Overall, the HyperTRIO design enables the system to utilize full available I/O bandwidth in a hyper-tenant environment.",
keywords = "I/O subsystem, address translation, virtualization",
author = "Alexey Lavrov and David Wentzlaff",
note = "Funding Information: We thank our anonymous reviewers for their valuable and useful feedback. This material is based on research sponsored by the NSF under Grant No. CCF-1822949, Air Force Research Laboratory (AFRL) and Defense Advanced Research Projects Agency (DARPA) under agreement No. FA8650-18-2-7846, FA8650-18-2-7852,and FA8650-18-2-7862.The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of Air Force Research Laboratory (AFRL) and Defense Advanced Research Projects Agency (DARPA), the NSF, or the U.S. Government. Publisher Copyright: {\textcopyright} 2020 IEEE.; 47th ACM/IEEE Annual International Symposium on Computer Architecture, ISCA 2020 ; Conference date: 30-05-2020 Through 03-06-2020",
year = "2020",
month = may,
doi = "10.1109/ISCA45697.2020.00048",
language = "English (US)",
series = "Proceedings - International Symposium on Computer Architecture",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "487--500",
booktitle = "Proceedings - 2020 ACM/IEEE 47th Annual International Symposium on Computer Architecture, ISCA 2020",
address = "United States",
}