TY - JOUR
T1 - Hybrid simulation for energy estimation of embedded software
AU - Muttreja, Anish
AU - Raghunathan, Anand
AU - Ravi, Srivaths
AU - Jha, Niraj K.
N1 - Funding Information:
Manuscript received March 31, 2005; revised April 13, 2006. This work was supported in part by the NSF under Grant CCF-0428446. Dr. S. Ravi was with NEC Labs, Princeton, when this work was done. This paper was recommended by Associate Editor F. N. Najm. A. Muttreja and N. K. Jha are with the Department of Electrical Engineering, Princeton University, Princeton, NJ 08544 USA. A. Raghunathan is with the NEC Labs, Princeton, NJ 08540 USA. S. Ravi is with the Texas Instruments, Bangalore 560 093, India. Digital Object Identifier 10.1109/TCAD.2007.895760
PY - 2007/10
Y1 - 2007/10
N2 - Software energy estimation is a critical step in the design of energy-efficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slow for iterative use in system-level exploration and for embedded systems with high software complexity. In this paper, we propose a methodology called hybrid simulation, which combines instruction set simulation with selective native execution (execution of some parts of the program directly on the simulation host computer). Hybrid simulation attempts to overcome the disadvantages of instruction-level simulation (low speed) and pure native execution (estimation accuracy and inapplicability to target-dependent code) while exploiting their advantages. In order to perform the energy estimation for natively executed subprograms, hybrid simulation leverages previously developed techniques for software energy macromodeling. This paper identifies and addresses the main challenges involved in hybrid simulation, including control/data transfer and memory synchronization between instruction set simulation and native execution domains, estimation errors due to macromodeling, and simulation overheads for switching between domains. We present an automatic tool flow for hybrid simulation, which analyzes a given program and selects functions for native execution in order to achieve maximum estimation efficiency while limiting estimation error. Our tool generates native "drop-in" modules that are linked into the instruction set simulator (ISS) and simulation "stubs" that are linked with the application to facilitate hybrid simulation. We have applied the proposed hybrid simulation methodology to a variety of embedded software programs, resulting in average speedups of 25.2× (maximum of 124×) and estimation error of only 3% (maximum of 6%), as compared to one of the fastest publicly available ISSs.
AB - Software energy estimation is a critical step in the design of energy-efficient embedded systems. Instruction-level simulation techniques, despite several advances, remain too slow for iterative use in system-level exploration and for embedded systems with high software complexity. In this paper, we propose a methodology called hybrid simulation, which combines instruction set simulation with selective native execution (execution of some parts of the program directly on the simulation host computer). Hybrid simulation attempts to overcome the disadvantages of instruction-level simulation (low speed) and pure native execution (estimation accuracy and inapplicability to target-dependent code) while exploiting their advantages. In order to perform the energy estimation for natively executed subprograms, hybrid simulation leverages previously developed techniques for software energy macromodeling. This paper identifies and addresses the main challenges involved in hybrid simulation, including control/data transfer and memory synchronization between instruction set simulation and native execution domains, estimation errors due to macromodeling, and simulation overheads for switching between domains. We present an automatic tool flow for hybrid simulation, which analyzes a given program and selects functions for native execution in order to achieve maximum estimation efficiency while limiting estimation error. Our tool generates native "drop-in" modules that are linked into the instruction set simulator (ISS) and simulation "stubs" that are linked with the application to facilitate hybrid simulation. We have applied the proposed hybrid simulation methodology to a variety of embedded software programs, resulting in average speedups of 25.2× (maximum of 124×) and estimation error of only 3% (maximum of 6%), as compared to one of the fastest publicly available ISSs.
KW - Energy estimation
KW - Hybrid simulation
KW - Native execution
KW - Processor simulation
UR - http://www.scopus.com/inward/record.url?scp=34748914147&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=34748914147&partnerID=8YFLogxK
U2 - 10.1109/TCAD.2007.895760
DO - 10.1109/TCAD.2007.895760
M3 - Article
AN - SCOPUS:34748914147
SN - 0278-0070
VL - 26
SP - 1843
EP - 1854
JO - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
JF - IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IS - 10
ER -