TY - JOUR
T1 - Hybrid LAE-CMOS Force-Sensing System Employing TFT-Based Compressed Sensing for Scalability of Tactile Sensing Skins
AU - Aygun, Levent E.
AU - Kumar, Prakhar
AU - Zheng, Zhiwu
AU - Chen, Ting Sheng
AU - Wagner, Sigurd
AU - Sturm, James C.
AU - Verma, Naveen
PY - 2019/12/1
Y1 - 2019/12/1
N2 - Tactile sensing requires form-fitting and dense sensor arrays over large-areas. Hybrid systems, combining Large-Area Electronics (LAE) and silicon-CMOS ICs to respectively provide diverse sensing and high-performance computation/control, enable a platform for such sensing. A key challenge is that hybrid systems require a large number of interfaces between the LAE and CMOS domains, particularly as the number of sensors scales. This paper presents an architecture that exploits the attribute of signal sparsity, commonly exhibited in large-scale tactile-sensing applications, to reduce the interfacing complexity to a level set by the sparsity rather than the number of sensors. This enhances scalability compared to sequential-scanning and active-matrix approaches. The architecture implements compressed sensing via thin-film-transistor (TFT) switches, and is demonstrated in a force-sensing system with 20 force sensors, a TFT die (with 161 ZnO TFTs) per sensor, and a custom CMOS IC for system readout and control. Acquisition error of 0.7 k[Formula: see text] is achieved over a 100 k Ω-20 k Ω sensing range, at energy and rate of 2.46 μ J/frame and 31 fps.
AB - Tactile sensing requires form-fitting and dense sensor arrays over large-areas. Hybrid systems, combining Large-Area Electronics (LAE) and silicon-CMOS ICs to respectively provide diverse sensing and high-performance computation/control, enable a platform for such sensing. A key challenge is that hybrid systems require a large number of interfaces between the LAE and CMOS domains, particularly as the number of sensors scales. This paper presents an architecture that exploits the attribute of signal sparsity, commonly exhibited in large-scale tactile-sensing applications, to reduce the interfacing complexity to a level set by the sparsity rather than the number of sensors. This enhances scalability compared to sequential-scanning and active-matrix approaches. The architecture implements compressed sensing via thin-film-transistor (TFT) switches, and is demonstrated in a force-sensing system with 20 force sensors, a TFT die (with 161 ZnO TFTs) per sensor, and a custom CMOS IC for system readout and control. Acquisition error of 0.7 k[Formula: see text] is achieved over a 100 k Ω-20 k Ω sensing range, at energy and rate of 2.46 μ J/frame and 31 fps.
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U2 - 10.1109/TBCAS.2019.2948326
DO - 10.1109/TBCAS.2019.2948326
M3 - Article
C2 - 31634845
SN - 1932-4545
VL - 13
SP - 1264
EP - 1276
JO - IEEE Transactions on Biomedical Circuits and Systems
JF - IEEE Transactions on Biomedical Circuits and Systems
IS - 6
ER -