TY - GEN
T1 - HP Precision
T2 - Proceedings of the Twenty-Second Annual Hawaii International Conference on System Sciences: Architecture Track
AU - Lee, Ruby B.
PY - 1989
Y1 - 1989
N2 - The author discusses the Hewlett Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs.
AB - The author discusses the Hewlett Packard Precision architecture, which was designed as a common architecture for HP computer systems. It has a RISC (reduced-instruction-set computer)-like execution model, with features for code compaction and execution time reduction for frequent instruction sequences. In addition, it has features for making the architecture extendible, for enhancing its longevity, and for supporting different operating environments. The author describes some aspects of the Precision processor architecture, its goals, how it addresses the spectrum of general-purpose use information, processing needs, and some architectural design tradeoffs.
UR - http://www.scopus.com/inward/record.url?scp=0024946244&partnerID=8YFLogxK
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M3 - Conference contribution
AN - SCOPUS:0024946244
SN - 0818619112
T3 - Proceedings of the Hawaii International Conference on System Science
SP - 242
EP - 251
BT - Proceedings of the Hawaii International Conference on System Science
PB - Publ by IEEE
Y2 - 3 January 1989 through 6 January 1989
ER -