High-level synthesis of distributed logic-memory architectures

Keyphrases

• Memory Architecture 100%
• Distributed Logic 100%
• Communication Overhead 33%
• General Architecture 33%
• Small Area 33%
• Geographic Proximity 33%
• Data-intensive Applications 33%
• Synchronization Cost 33%
• Memory Hierarchy 33%
• Memory Interconnects 33%
• Global Communication 33%
• High-speed Design 33%
• Coarse-grained Parallelism 33%
• Data Access 33%
• Data Computation 33%

Computer Science

• Memory Architecture 100%
• Synthesis Technique 20%
• Intermediate Step 20%
• Datapath 20%
• Memory Interconnects 20%
• Resulting Register 20%
• Memory Hierarchy 20%
• Communication Overhead 20%
• data-intensive application 20%
• Data Access 20%
• Grained Parallelism 20%