Hardware multithreaded transactions

Jordan Fix, Hansen Zhang, Nayana P. Nagendra, Sophie Qiu, Sotiris Apostolakis, David I. August

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Speculation with transactional memory systems helps programmers and compilers produce profitable thread-level parallel programs. Prior work shows that supporting transactions that can span multiple threads, rather than requiring transactions be contained within a single thread, enables new types of speculative parallelization techniques for both programmers and parallelizing compilers. Unfortunately, software support for multi-threaded transactions (MTXs) comes with significant additional inter-thread communication overhead for speculation validation. This overhead can make otherwise good parallelization unprofitable for programs with sizeable read and write sets. Some programs using these prior software MTXs overcame this problem through significant efforts by expert programmers to minimize these sets and optimize communication, capabilities which compiler technology has been unable to equivalently achieve. Instead, this paper makes speculative parallelization less laborious and more feasible through low-overhead speculation validation, presenting the first complete design, implementation, and evaluation of hardware MTXs. Even with maximal speculation validation of every load and store inside transactions of tens to hundreds of millions of instructions, profitable parallelization of complex programs can be achieved. Across 8 benchmarks, this system achieves a geomean speedup of 99% over sequential execution on a multicore machine with 4 cores.

Original languageEnglish (US)
Title of host publicationProceedings of the 23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018
PublisherAssociation for Computing Machinery
Pages15-29
Number of pages15
Volume53
Edition2
ISBN (Electronic)9781450349116
DOIs
StatePublished - Mar 19 2018
Event23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018 - Williamsburg, United States
Duration: Mar 24 2018Mar 28 2018

Other

Other23rd International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS 2018
CountryUnited States
CityWilliamsburg
Period3/24/183/28/18

All Science Journal Classification (ASJC) codes

  • Computer Science(all)

Keywords

  • Hardware transactional memory
  • Multithreaded transactions
  • Pipelined parallelism
  • Thread-level speculation

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