Abstract
Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.
| Original language | English (US) |
|---|---|
| Pages (from-to) | 53-56 |
| Number of pages | 4 |
| Journal | Technical Digest - International Electron Devices Meeting |
| State | Published - 2003 |
| Event | IEEE International Electron Devices Meeting - Washington, DC, United States Duration: Dec 8 2003 → Dec 10 2003 |
All Science Journal Classification (ASJC) codes
- Electronic, Optical and Magnetic Materials
- Condensed Matter Physics
- Electrical and Electronic Engineering
- Materials Chemistry
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