Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

Haizhou Yin; K. D. Hobart; Rebecca L. Peterson; F. J. Kub; S. R. Shieh; T. S. Duffy; J. C. Sturm

Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

Haizhou Yin, K. D. Hobart, Rebecca L. Peterson, F. J. Kub, S. R. Shieh, T. S. Duffy, J. C. Sturm

Research output: Contribution to journal › Conference article › peer-review

Abstract

Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si _0.85Ge _0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.

Original language	English (US)
Pages (from-to)	53-56
Number of pages	4
Journal	Technical Digest - International Electron Devices Meeting
State	Published - 2003
Event	IEEE International Electron Devices Meeting - Washington, DC, United States Duration: Dec 8 2003 → Dec 10 2003

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Condensed Matter Physics
Electrical and Electronic Engineering
Materials Chemistry

Cite this

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title = "Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers",

abstract = "Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut{\textregistered} processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.",

author = "Haizhou Yin and Hobart, {K. D.} and Peterson, {Rebecca L.} and Kub, {F. J.} and Shieh, {S. R.} and Duffy, {T. S.} and Sturm, {J. C.}",

year = "2003",

language = "English (US)",

pages = "53--56",

journal = "Technical Digest - International Electron Devices Meeting",

issn = "0163-1918",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

note = "IEEE International Electron Devices Meeting ; Conference date: 08-12-2003 Through 10-12-2003",

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TY - JOUR

T1 - Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

AU - Yin, Haizhou

AU - Hobart, K. D.

AU - Peterson, Rebecca L.

AU - Kub, F. J.

AU - Shieh, S. R.

AU - Duffy, T. S.

AU - Sturm, J. C.

PY - 2003

Y1 - 2003

N2 - Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.

AB - Fully-depleted strained Si n-channel MOSFETs were demonstrated on a compliant borophosphorosilicate insulator (BPSG) without an underlying SiGe buffer layer. Stress balance of a SiGe/Si structure, transferred onto BPSG by wafer bonding and Smart-cut® processes, is utilized for the first time to make strained-Si on insulator (sSOI) by a process that does not involve the introduction of misfit dislocations. Strained-Si n-channel MOSFETs with a strain level of 0.6%, equivalent to that of a conventional strained Si layer grown on a relaxed Si 0.85Ge 0.15 buffer, exhibit 60% mobility enhancement over the control, in good agreement with theory. This approach to fabricating strained Si overcomes any potential process or device complexity due to the presence of a SiGe layer in the final devices.

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M3 - Conference article

AN - SCOPUS:0842288293

SN - 0163-1918

SP - 53

EP - 56

JO - Technical Digest - International Electron Devices Meeting

JF - Technical Digest - International Electron Devices Meeting

T2 - IEEE International Electron Devices Meeting

Y2 - 8 December 2003 through 10 December 2003

ER -

Fully-depleted Strained-Si on Insulator NMOSFETs without Relaxed SiGe Buffers

Abstract

All Science Journal Classification (ASJC) codes

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