TY - GEN
T1 - fMAXExceeding 3 GHz in Self-Aligned Zinc-Oxide Thin-Film Transistors with Micron-Scale Gate Length
AU - Ma, Yue
AU - Wagner, Sigurd
AU - Verma, Naveen
AU - Sturm, James C.
N1 - Publisher Copyright:
© 2023 IEEE.
PY - 2023
Y1 - 2023
N2 - Large-area electronic (LAE) metal-oxide thin-film transistors (TFTs) with f{T} and/or f{MAX} beyond 1 GHz demonstrated over recent years [1]-[3] enable critical circuits and systems towards wireless applications in Internet of Things and 5G/6G (e.g., a 1-GHz phased array for far-field radiation beam steering [4]). Since most existing approaches towards GHz TFTs rely on improved charge-carrier mobility through high-temperature deposition of semiconductors and/or submicron TFT feature size achieved by electron-beam lithography, they are incompatible with low-cost, large-area, and flex-substrate fabrication of TFTs. By additional dependence on gate resistance R{G}, f{MAX} opens broader device engineering space to maintain large-area and flex-compatibility, and motivates f{MAX}-limited circuit/system topologies [4]. Here, we show that with optimal TFT bias voltages and reduced R{G} through TFT width scaling, a record-high f{MAX} exceeding 3 GHz is achieved in self-aligned zinc-oxide (ZnO) TFTs with gate length of \sim 1\ \mu m, patterned by photolithography, with a maximum process temperature of ∼200 °C. A high-frequency non-quasi-static TFT model [5] is used to guide the device engineering efforts towards this result.
AB - Large-area electronic (LAE) metal-oxide thin-film transistors (TFTs) with f{T} and/or f{MAX} beyond 1 GHz demonstrated over recent years [1]-[3] enable critical circuits and systems towards wireless applications in Internet of Things and 5G/6G (e.g., a 1-GHz phased array for far-field radiation beam steering [4]). Since most existing approaches towards GHz TFTs rely on improved charge-carrier mobility through high-temperature deposition of semiconductors and/or submicron TFT feature size achieved by electron-beam lithography, they are incompatible with low-cost, large-area, and flex-substrate fabrication of TFTs. By additional dependence on gate resistance R{G}, f{MAX} opens broader device engineering space to maintain large-area and flex-compatibility, and motivates f{MAX}-limited circuit/system topologies [4]. Here, we show that with optimal TFT bias voltages and reduced R{G} through TFT width scaling, a record-high f{MAX} exceeding 3 GHz is achieved in self-aligned zinc-oxide (ZnO) TFTs with gate length of \sim 1\ \mu m, patterned by photolithography, with a maximum process temperature of ∼200 °C. A high-frequency non-quasi-static TFT model [5] is used to guide the device engineering efforts towards this result.
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U2 - 10.1109/DRC58590.2023.10186903
DO - 10.1109/DRC58590.2023.10186903
M3 - Conference contribution
AN - SCOPUS:85167869678
T3 - Device Research Conference - Conference Digest, DRC
BT - 2023 Device Research Conference, DRC 2023
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 2023 Device Research Conference, DRC 2023
Y2 - 25 June 2023 through 28 June 2023
ER -