Abstract
As computer architects continually push the limits of microarchitectural performance optimizations, securing hardware against speculative execution attacks feels like a Sisyphean task. This article explores the critical role computer architects can play in advancing hardware security through formal verification.
| Original language | English (US) |
|---|---|
| Pages | 138-143 |
| Number of pages | 6 |
| Volume | 57 |
| No | 10 |
| Specialist publication | Computer |
| DOIs | |
| State | Published - 2024 |
| Externally published | Yes |
All Science Journal Classification (ASJC) codes
- General Computer Science