TY - GEN
T1 - Formal online methods for voltage/frequency control in multiple clock domain microprocessors
AU - Wu, Qiang
AU - Juang, Philo
AU - Martonosi, Margaret Rose
AU - Clark, Douglas W.
PY - 2004
Y1 - 2004
N2 - Multiple Clock Domain (MCD) processors are a promising future alternative to today's fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor has the extra flexibility to adjust the voltage and frequency in each domain independently. Most existing DVFS approaches are profile-based offline schemes which are mainly suitable for applications whose execution characteristics are constrained and repeatable. While some work has been published about online DVFS schemes, the prior approaches are typically heuristic-based. In this paper, we present an effective online DVFS scheme for an MCD processor which takes a formal analytic approach, is driven by dynamic workloads, and is suitable for all applications. In our approach, we model an MCD processor as a queue-domain network and the online DVFS as a feedback control problem with issue queue occupancies as feedback signals. A dynamic stochastic queuing model is first proposed and linearized through an accurate linearization technique. A controller is then designed and verified by stability analysis. Finally we evaluate our DVFS scheme through a cycle-accurate simulation with a broad set of applications selected from MediaBench and SPEC2000 benchmark suites. Compared to the best-known prior approach, which is heuristic-based, the proposed online DVFS scheme is substantially more effective due to its automatic regulation ability. For example, we have achieved a 2-3 fold increase in efficiency in terms of energy-delay product improvement. In addition, our control theoretic technique is more resilient, requires less tuning effort, and has better scalability as compared to prior online DVFS schemes. We believe that the techniques and methodology described in this paper can be generalized for energy control in processors other than MCD, such as tiled stream processors.
AB - Multiple Clock Domain (MCD) processors are a promising future alternative to today's fully synchronous designs. Dynamic Voltage and Frequency Scaling (DVFS) in an MCD processor has the extra flexibility to adjust the voltage and frequency in each domain independently. Most existing DVFS approaches are profile-based offline schemes which are mainly suitable for applications whose execution characteristics are constrained and repeatable. While some work has been published about online DVFS schemes, the prior approaches are typically heuristic-based. In this paper, we present an effective online DVFS scheme for an MCD processor which takes a formal analytic approach, is driven by dynamic workloads, and is suitable for all applications. In our approach, we model an MCD processor as a queue-domain network and the online DVFS as a feedback control problem with issue queue occupancies as feedback signals. A dynamic stochastic queuing model is first proposed and linearized through an accurate linearization technique. A controller is then designed and verified by stability analysis. Finally we evaluate our DVFS scheme through a cycle-accurate simulation with a broad set of applications selected from MediaBench and SPEC2000 benchmark suites. Compared to the best-known prior approach, which is heuristic-based, the proposed online DVFS scheme is substantially more effective due to its automatic regulation ability. For example, we have achieved a 2-3 fold increase in efficiency in terms of energy-delay product improvement. In addition, our control theoretic technique is more resilient, requires less tuning effort, and has better scalability as compared to prior online DVFS schemes. We believe that the techniques and methodology described in this paper can be generalized for energy control in processors other than MCD, such as tiled stream processors.
KW - Dynamic Voltage/Frequency Scaling
KW - Formal Methods
KW - MCD processors
UR - http://www.scopus.com/inward/record.url?scp=12844283854&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=12844283854&partnerID=8YFLogxK
U2 - 10.1145/1024393.1024423
DO - 10.1145/1024393.1024423
M3 - Conference contribution
AN - SCOPUS:12844283854
SN - 1581138040
SN - 9781581138047
T3 - 11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XI
SP - 248
EP - 259
BT - 11th International Conference on Architectural Support for Programming, Languages and Operating Systems, ASPLOS XI
PB - Association for Computing Machinery
T2 - 11th International Conference on Architectural Support for Programming Languages and Operating Systems, ASPLOS XI
Y2 - 9 October 2004 through 13 October 2004
ER -