Abstract
Fin-type field-effect transistors (FinFETs) are promising substitutes for bulk CMOS at the nanoscale. FinFETs are double-gate devices. The two gates of a FinFET can either be shorted for higher perfomance or independently controlled for lower leakage or reduced transistor count. This gives rise to a rich design space. This chapter provides an introduction to various interesting FinFET logic design styles, novel circuit designs, and layout considerations.
Original language | English (US) |
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Title of host publication | Nanoelectronic Circuit Design |
Publisher | Springer New York |
Pages | 23-54 |
Number of pages | 32 |
ISBN (Print) | 9781441974440 |
DOIs | |
State | Published - 2011 |
All Science Journal Classification (ASJC) codes
- General Engineering
Keywords
- Circuit design
- FinFETs
- Layout
- Leakage power
- Power optimization