Evaluation of multiple supply and threshold voltages for low-power FinFET circuit synthesis

Prateek Mishra, Anish Muttreja, Niraj Kumar Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

5 Scopus citations

Abstract

In modern circuits, power efficiency is a central determinant of circuit efficiency. The exponential increase in the number of transistors in a chip has led to increased chip power dissipation. Therefore, low-power circuits have become a top priority in modern VLSI design. With scaling, leakage power accounts for an increasingly larger portion (>40%) of the total power consumption in deep submicron technologies. FinFET technology has been proposed as a promising alternative to deep submicron bulk CMOS technology, because of its better scalability, short-channel characteristics, ability to suppress leakage current, and mitigate device-to-device variability when compared to bulk CMOS. The subthreshold slope of a FinFET is approximately 60mV which is close to ideal. In this paper, we propose a methodology for low-power FinFET based circuit synthesis. A mechanism called TCMS (Threshold Control through Multiple Supply Voltages) was previously proposed for improving the power efficiency of FinFET based global interconnects. We propose a significant generalization of TCMS to the design of any logic circuit. This scheme represents a significant divergence from the conventional multiple-supply voltage schemes considered in the past. It also obviates the need for voltage level-converters. We employ accurate delay and power estimates using table look-up methods based on HSPICE simulations for supply voltage and threshold voltage optimization. Experimental results demonstrate that TCMS can provide power savings of 67.6% and device area savings of 65.2% under relaxed delay constraints.

Original languageEnglish (US)
Title of host publication2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008
Pages77-84
Number of pages8
DOIs
StatePublished - Sep 23 2008
Event2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008 - Anaheim, CA, United States
Duration: Jun 12 2008Jun 13 2008

Publication series

Name2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008

Other

Other2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008
CountryUnited States
CityAnaheim, CA
Period6/12/086/13/08

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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    Mishra, P., Muttreja, A., & Jha, N. K. (2008). Evaluation of multiple supply and threshold voltages for low-power FinFET circuit synthesis. In 2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008 (pp. 77-84). [4585795] (2008 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2008). https://doi.org/10.1109/NANOARCH.2008.4585795