Evaluation of MindPalace for Chip Design Tradeoffs on Function-as-a-Service

Function-as-a-Service (FaaS) continues to be a popular and growing way to access abundant cloud resources. Both the research community and industry have begun investigating designing new or modifying existing processors for FaaS. While there exists many traditional computer architecture simulators, the complex, full-system and full-stack nature of FaaS workloads has opened the door to needing more purpose-built FaaS-specific simulators along with easy to use, simulation-friendly, characteristic workloads. In order to fully study FaaS workloads, the simulator needs to run a full OS running many concurrent containers with a full-stack serverless platform like OpenWhisk. This paper characterizes and describes MindPalace which is a simulator and framework designed to investigate microarchitecture innovations for FaaS workloads. MindPalace utilizes both QEMU and ChampSim. With QEMU, MindPalace is able to run complex, full-system and full-stack workloads including running the Apache OpenWhisk platform. By leveraging ChampSim, MindPalace can conduct detailed computer architecture and micro-architecture research and has access to advanced micro-architecture models for branch predictors and prefetchers. In addition, MindPalace uses a VM with Apache OpenWhisk running. In this work, we compare MindPalace to other simulators and use MindPalace to investigate FaaS-specific architecture ideas including a design which reloads branch predictor state between function invocations. We also characterize MindPalace and study the accuracy of simulation versus real hardware in terms of branch prediction rates, cache miss rates, and IPC.