Evaluation of cache-based superscalar and cacheless vector architectures for scientific computations

Leonid Oliker, Andrew Canning, Jonathan Carter, John Shalf, David Skinner, Stéphane Ethier, Rupak Biswas, Jahed Djomehri, Rob Van Der Wijngaart

Research output: Chapter in Book/Report/Conference proceedingConference contribution

17 Scopus citations

Abstract

The growing gap between sustained and peak performance for scientific applications is a well-known problem in high end computing. The recent development of parallel vector systems offers the potential to bridge this gap for many computational science codes and deliver a substantial increase in comput-ing capabilities. This paper examines the intranode performance of the NEC SX-6 vector processor and the cache-based IBM Power3/4 superscalar architectures across a number of scientific computing areas. First, we present the performance of a microbenchmark suite that examines low-level machine characteristics. Next, we study the behavior of the NAS Parallel Benchmarks. Finally, we evaluate the performance of several scientific computing codes. Results demonstrate that the SX-6 achieves high performance on a large fraction of our applications and often significantly outperforms the cache-based architectures. However, certain applications are not easily amenable to vectorization and would require extensive algorithm and implementation reengineering to utilize the SX-6 effectively.

Original languageEnglish (US)
Title of host publicationProceedings of the 2003 ACM/IEEE Conference on Supercomputing, SC 2003
DOIs
StatePublished - 2003
Event2003 ACM/IEEE Conference on Supercomputing, SC 2003 - Phoenix, AZ, United States
Duration: Nov 15 2003Nov 21 2003

Publication series

NameProceedings of the 2003 ACM/IEEE Conference on Supercomputing, SC 2003

Other

Other2003 ACM/IEEE Conference on Supercomputing, SC 2003
Country/TerritoryUnited States
CityPhoenix, AZ
Period11/15/0311/21/03

All Science Journal Classification (ASJC) codes

  • Software

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