Eliminating memory bottlenecks for a JPEG encoder through distributed logic-memory architecture and computation-unit integrated memory

Chao Huang, Srivaths Ravi, Anand Raghunathan, Niraj K. Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

3 Scopus citations

Abstract

Several application domains, including multimedia and network processing, are highly memory intensive, making memory a bottleneck to designing higher performance and lower power application-specific integrated circuits (ASICs). Design methodologies based on innovative architectures, namely distributed logic-memory architectures and computation-unit integrated memories, have been shown to improve circuit performance significantly. In this paper, these design methodologies are discussed and evaluated through the implementation of an ASIC for the JPEG still image compression standard. The implemented system is capable of stand-alone image compression, and has been synthesized using the TSMC 0.13μm 1.20V eight-layer metal CMOS process. A four-way distributed implementation can achieve an execution time of 2.23ms (a speed-up of 2.87X) for a 128 × 128 input image at the cost of chip area overhead of 51.4% while the energy-delay product is reduced by 2.35X. Design metrics of various other implementations are also compared.

Original languageEnglish (US)
Title of host publicationProceedings of the IEEE 2005 Custom Integrated Circuits Conference
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages239-242
Number of pages4
ISBN (Print)0780390237, 9780780390232
DOIs
StatePublished - 2005
EventIEEE 2005 Custom Integrated Circuits Conference - San Jose, CA, United States
Duration: Sep 18 2005Sep 21 2005

Publication series

NameProceedings of the Custom Integrated Circuits Conference
Volume2005
ISSN (Print)0886-5930

Other

OtherIEEE 2005 Custom Integrated Circuits Conference
Country/TerritoryUnited States
CitySan Jose, CA
Period9/18/059/21/05

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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