Effects of film morphology and gate dielectric surface preparation on the electrical characteristics of organic-vapor-phase-deposited pentacene thin-film transistors

Max Shtein, Jonathan Mapel, Jay B. Benziger, Stephen R. Forrest

Research output: Contribution to journalArticle

639 Scopus citations

Abstract

Organic vapor phase deposition was used to grow polycrystalline pentacene channel thin-film transistors. Substrate temperature, chamber pressure during film deposition, and growth rate were used to vary the crystalline grain size of pentacene films on O2-plasma treated SiO2 from 0.2 to 5 μm, leading to room-temperature saturation regime field-effect hole mobilities (μeff) from 0.05±0.02 to 0.5±0.1cm 2/Vs, respectively. Surface treatment of SiO2 with octadecyltrichlorosilane (OTS) prior to pentacene deposition resulted in μeff≤1.6cm2/Vs, and drain current on/off ratios of ≤108 at room temperature, while dramatically reducing the average grain size. X-ray diffraction studies indicate that the OTS treatment decreases the order of the molecular stacks. This suggests an increased density of flat-lying molecules, accompanying the improvement of the hole mobility at the pentacene/OTS interface.

Original languageEnglish (US)
Pages (from-to)268-270
Number of pages3
JournalApplied Physics Letters
Volume81
Issue number2
DOIs
StatePublished - Jul 8 2002

All Science Journal Classification (ASJC) codes

  • Physics and Astronomy (miscellaneous)

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