Dynamically reconfigurable architecture for fault-tolerant 2D networks-on-chip

Keyphrases

• Network on chip 100%
• Dynamically Reconfigurable Architecture 100%
• Fault-tolerant 100%
• Rerouting 100%
• 2D Network 100%
• Fault Tolerance 50%
• Router 50%
• Shortest Path 50%
• Hardware Overhead 50%
• Dynamically Reconfigurable 50%
• Semiconductor Technology 50%
• Longest Path 50%
• Network Performance 50%
• Efficient Network 50%
• NoCs 50%
• Router Architecture 50%
• Robust Networks 50%
• Device Scaling 50%
• Fault-tolerant Strategy 50%
• Minimal Routing 50%
• Reconfigurable Techniques 50%

Computer Science

• Networks on Chips 100%
• reconfigurable architecture 100%
• Fault Tolerant 100%
• Experimental Result 50%
• fault-tolerance 50%
• Network Performance 50%
• Hardware Overhead 50%
• Longest Path 50%
• Router Architecture 50%
• Communicating Node 50%
• Routers 50%