Abstract
With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and power-delivery issues are becoming especially critical for high-performance computing systems. In this work, we investigate dynamic thermal management as a technique to control CPU power dissipation. With the increasing usage of clock gating techniques, the average power dissipation typically seen by common applications is becoming much less than the chip's rated maximum power dissipation. However, system designers still must design thermal heat sinks to withstand the worst-case scenario. We define and investigate the major components of any dynamic thermal management scheme. Specifically we explore the tradeoffs between several mechanisms for responding to periods of thermal trauma and we consider the effects of hardware and software implementations. With appropriate dynamic thermal management, the CPU can be designed for a much lower maximum power rating, with minimal performance impact for typical applications.
Original language | English (US) |
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Pages | 171-182 |
Number of pages | 12 |
State | Published - 2001 |
Event | 7th International Symposium on High-Performance Computer Architecture - Nuevo Leon, Mex Duration: Oct 20 2000 → Oct 24 2000 |
Other
Other | 7th International Symposium on High-Performance Computer Architecture |
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City | Nuevo Leon, Mex |
Period | 10/20/00 → 10/24/00 |
All Science Journal Classification (ASJC) codes
- Hardware and Architecture