Dynamic thermal management for high-performance microprocessors

Research output: Chapter in Book/Report/Conference proceedingConference contribution

563 Scopus citations

Abstract

With the increasing clock rate and transistor count of today's microprocessors, power dissipation is becoming a critical component of system design complexity. Thermal and power-delivery issues are becoming especially critical for high-performance computing systems. In this work, we investigate dynamic thermal management as a technique to control CPU power dissipation. With the increasing usage of clock gating techniques, the average power dissipation typically seen by common applications is becoming much less than the chip's rated maximum power dissipation. However, system designers still must design thermal heat sinks to withstand the worst-case scenario. We define and investigate the major components of any dynamic thermal management scheme. Specifically we explore the tradeoffs between several mechanisms for responding to periods of thermal trauma and we consider the effects of hardware and software implementations. With appropriate dynamic thermal management, the CPU can be designed for a much lower maximum power rating, with minimal performance impact for typical applications.

Original languageEnglish (US)
Title of host publicationIEEE High-Performance Computer Architecture Symposium Proceedings
Pages171-182
Number of pages12
StatePublished - Jan 1 2001
Event7th International Symposium on High-Performance Computer Architecture - Nuevo Leon, Mex
Duration: Oct 20 2000Oct 24 2000

Other

Other7th International Symposium on High-Performance Computer Architecture
CityNuevo Leon, Mex
Period10/20/0010/24/00

All Science Journal Classification (ASJC) codes

  • Engineering(all)

Fingerprint Dive into the research topics of 'Dynamic thermal management for high-performance microprocessors'. Together they form a unique fingerprint.

  • Cite this

    Brooks, D., & Martonosi, M. R. (2001). Dynamic thermal management for high-performance microprocessors. In IEEE High-Performance Computer Architecture Symposium Proceedings (pp. 171-182)