Dynamic power management for microprocessors: a case study

V. Tiwari, R. Donnelly, S. Malik, R. Gonzales

Research output: Contribution to conferencePaperpeer-review

24 Scopus citations

Abstract

Dynamic power management is one of the most popular and successful low power design techniques in commercial integrated circuits, especially microprocessors. However, despite its significance, relatively little has been published about it. The purpose of this paper is to provide an open discussion of the application of dynamic power management for a real microprocessor. TORCH, a statically scheduled superscalar microprocessor, is chosen for this purpose. We describe several techniques that we classify as dynamic power management - techniques aimed at reducing the power wasted in unnecessary circuit activity in the design. Some of the techniques have been used before for low power designs. Some others are new and it is demonstrated that significant power savings are achieved with these as well. We provide design details to illustrate the application of instances of all dynamic power management techniques for TORCH. Using a combination of techniques, the power consumption is reduced by about 23%. We hope that this study would lead to a wider recognition of dynamic power management as very effective and practical power reduction technique.

Original languageEnglish (US)
Pages185-192
Number of pages8
StatePublished - 1997
Externally publishedYes
EventProceedings of the 1997 10th International Conference on VLSI Design - Hyderabad, India
Duration: Jan 4 1997Jan 7 1997

Other

OtherProceedings of the 1997 10th International Conference on VLSI Design
CityHyderabad, India
Period1/4/971/7/97

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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