Digital VLSI architectures for neural networks

S. Y. Kung, J. N. Hwang

Research output: Contribution to journalConference articlepeer-review

12 Scopus citations


A generic iterative model is proposed for a wide variety of artificial neural networks (ANNs): single-layer feedback networks, multilayer feedforward networks, hierarchical competitive networks, and some probabilistic models. A unified formulation is provided for the retrieving and learning phases of most ANNs. On the basis of the formulation, a programmable ring systolic array is developed. The architecture maximizes the strength of VLSI in terms of intensive and pipelined computing and yet circumvents the limitation on communication. It can be adopted as a basic structure for a universal neurocomputer architecture.

Original languageEnglish (US)
Pages (from-to)445-448
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
StatePublished - 1989
EventIEEE International Symposium on Circuits and Systems 1989, the 22nd ISCAS. Part 1 - Portland, OR, USA
Duration: May 8 1989May 11 1989

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering


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