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Design of Testable CMOS Logic Circuits Under Arbitrary Delays
Niraj K. Jha
, Jacob A. Abraham
Research output
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Contribution to journal
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Article
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peer-review
34
Scopus citations
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Computer Science
Sufficient Condition
100%
And Gate
100%
Mathematics
Test Set
100%
Necessary and Sufficient Condition
33%
Keyphrases
CMOS Realization
50%