Design and evaluation of hybrid fault-detection systems

George A. Reis, Jonathan Chang, Neil Vachharajani, Ram Rangan, David I. August, Shubhendu S. Mukherjee

Research output: Chapter in Book/Report/Conference proceedingConference contribution

112 Scopus citations

Abstract

As chip densities and clock rates increase, processors are becoming more susceptible to transient faults that can affect program correctness. Up to now, system designers have primarily considered hardware-only and software-only fault-detection mechanisms to identify and mitigate the deleterious effects of transient faults. These two fault-detection systems, however, are extremes in the design space, representing sharp trade-offs between hardware cost, reliability, and performance. In this paper, we identify hybrid hardware/software fault-detection mechanisms as promising alternatives to hardware-only and software-only systems. These hybrid systems offer designers more options to fit their reliability needs within their hardware and performance budgets. We propose and evaluate CRAFT, a suite of three such hybrid techniques, to illustrate the potential of the hybrid approach. For fair, quantitative comparisons among hardware, software, and hybrid systems, we introduce a new metric, Mean Work To Failure, which is able to compare systems for which machine instructions do not represent a constant unit of work. Additionally, we present a new simulation framework which rapidly assesses reliability and does not depend on manual identification of failure modes. Our evaluation illustrates that CRAFT, and hybrid techniques in general, offer attractive options in the fault-detection design space.

Original languageEnglish (US)
Title of host publicationProceedings - 32nd International Symposium on Computer Architecture, ISCA 2005
Pages148-159
Number of pages12
DOIs
StatePublished - Nov 10 2005
Event32nd Interntional Symposium on Computer Architecture, ISCA 2005 - Madison, WI, United States
Duration: Jun 4 2005Jun 8 2005

Publication series

NameProceedings - International Symposium on Computer Architecture
ISSN (Print)1063-6897

Other

Other32nd Interntional Symposium on Computer Architecture, ISCA 2005
CountryUnited States
CityMadison, WI
Period6/4/056/8/05

All Science Journal Classification (ASJC) codes

  • Engineering(all)

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    Reis, G. A., Chang, J., Vachharajani, N., Rangan, R., August, D. I., & Mukherjee, S. S. (2005). Design and evaluation of hybrid fault-detection systems. In Proceedings - 32nd International Symposium on Computer Architecture, ISCA 2005 (pp. 148-159). (Proceedings - International Symposium on Computer Architecture). https://doi.org/10.1109/ISCA.2005.21