DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

Fei Gao; Ting Jung Chang; Ang Li; Marcelo Orenes-Vera; Davide Giri; Paul J. Jackson; August Ning; Georgios Tziantzioulis; Joseph Zuckerman; Jinzheng Tu; Kaifeng Xu; Grigory Chirkov; Gabriele Tombesi; Jonathan Balkind; Margaret Martonosi; Luca Carloni; David Wentzlaff

doi:10.1109/CICC57935.2023.10121257

DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET

Fei Gao, Ting Jung Chang, Ang Li, Marcelo Orenes-Vera, Davide Giri, Paul J. Jackson, August Ning, Georgios Tziantzioulis, Joseph Zuckerman, Jinzheng Tu, Kaifeng Xu, Grigory Chirkov, Gabriele Tombesi, Jonathan Balkind, Margaret Martonosi, Luca Carloni, David Wentzlaff

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

4 Scopus citations

Abstract

As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.

Original language	English (US)
Title of host publication	2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings
Publisher	Institute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)	9798350399486
DOIs	https://doi.org/10.1109/CICC57935.2023.10121257
State	Published - 2023
Event	44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023 - San Antonio, United States Duration: Apr 23 2023 → Apr 26 2023

Publication series

Name	Proceedings of the Custom Integrated Circuits Conference
Volume	2023-April
ISSN (Print)	0886-5930

Conference

Conference	44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023
Country/Territory	United States
City	San Antonio
Period	4/23/23 → 4/26/23

All Science Journal Classification (ASJC) codes

Electrical and Electronic Engineering

Access to Document

10.1109/CICC57935.2023.10121257

Cite this

Gao, F., Chang, T. J., Li, A., Orenes-Vera, M., Giri, D., Jackson, P. J., Ning, A., Tziantzioulis, G., Zuckerman, J., Tu, J., Xu, K., Chirkov, G., Tombesi, G., Balkind, J., Martonosi, M., Carloni, L., & Wentzlaff, D. (2023). DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. In 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings (Proceedings of the Custom Integrated Circuits Conference; Vol. 2023-April). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CICC57935.2023.10121257

Gao, Fei ; Chang, Ting Jung ; Li, Ang et al. / DECADES : A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings of the Custom Integrated Circuits Conference).

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title = "DECADES: A 67mm2, 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET",

abstract = "As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.",

author = "Fei Gao and Chang, {Ting Jung} and Ang Li and Marcelo Orenes-Vera and Davide Giri and Jackson, {Paul J.} and August Ning and Georgios Tziantzioulis and Joseph Zuckerman and Jinzheng Tu and Kaifeng Xu and Grigory Chirkov and Gabriele Tombesi and Jonathan Balkind and Margaret Martonosi and Luca Carloni and David Wentzlaff",

note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023 ; Conference date: 23-04-2023 Through 26-04-2023",

year = "2023",

doi = "10.1109/CICC57935.2023.10121257",

language = "English (US)",

series = "Proceedings of the Custom Integrated Circuits Conference",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

booktitle = "2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings",

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Gao, F, Chang, TJ, Li, A, Orenes-Vera, M, Giri, D, Jackson, PJ, Ning, A, Tziantzioulis, G, Zuckerman, J, Tu, J, Xu, K, Chirkov, G, Tombesi, G, Balkind, J, Martonosi, M, Carloni, L & Wentzlaff, D 2023, DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. in 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Proceedings of the Custom Integrated Circuits Conference, vol. 2023-April, Institute of Electrical and Electronics Engineers Inc., 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023, San Antonio, United States, 4/23/23. https://doi.org/10.1109/CICC57935.2023.10121257

DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. / Gao, Fei; Chang, Ting Jung; Li, Ang et al.
2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc., 2023. (Proceedings of the Custom Integrated Circuits Conference; Vol. 2023-April).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

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AU - Gao, Fei

AU - Chang, Ting Jung

AU - Li, Ang

AU - Orenes-Vera, Marcelo

AU - Giri, Davide

AU - Jackson, Paul J.

AU - Ning, August

AU - Tziantzioulis, Georgios

AU - Zuckerman, Joseph

AU - Tu, Jinzheng

AU - Xu, Kaifeng

AU - Chirkov, Grigory

AU - Tombesi, Gabriele

AU - Balkind, Jonathan

AU - Martonosi, Margaret

AU - Carloni, Luca

AU - Wentzlaff, David

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AB - As Moore's Law is coming to an end, heterogeneous SoCs have become ubiquitous, improving performance and efficiency with specialized hardware. However, the addition of hardware accelerators makes data supply more challenging. Feeding data to accelerators becomes a bottleneck, especially for data-intensive workloads such as graph analytics, sparse linear algebra, and machine learning applications. DECADES addresses this issue with a combination of accelerators, embedded FPGA (eFPGA), and its unique ''intelligent storage'' (IS) tile. DECADES is one of the largest chips ever built in academia and has the highest core count of cache-coherent, OS-capable, 64-bit RISC-V processors.

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PB - Institute of Electrical and Electronics Engineers Inc.

Y2 - 23 April 2023 through 26 April 2023

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Gao F, Chang TJ, Li A, Orenes-Vera M, Giri D, Jackson PJ et al. DECADES: A 67mm², 1.46TOPS, 55 Giga Cache-Coherent 64-bit RISC-V Instructions per second, Heterogeneous Manycore SoC with 109 Tiles including Accelerators, Intelligent Storage, and eFPGA in 12nm FinFET. In 2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings. Institute of Electrical and Electronics Engineers Inc. 2023. (Proceedings of the Custom Integrated Circuits Conference). doi: 10.1109/CICC57935.2023.10121257