TY - GEN
T1 - Current gain of amorphous silicon thin-film transistors above the cutoff frequency
AU - Rieutort-Louis, Warren
AU - Huang, Liechao
AU - Hu, Yingzhe
AU - Sanz-Robinson, Josue
AU - Moy, Tiffany
AU - Afsar, Yasmin
AU - Sturm, James C.
AU - Verma, Naveen
AU - Wagner, Sigurd
PY - 2014
Y1 - 2014
N2 - A key challenge for the development of high functionality thin-film large-area electronic systems is the operational frequencies achievable by Thin-Film Transistors (TFTs). These frequencies are typically limited by low transconductances and large (gate and overlap) capacitances. However, we have recently demonstrated energy-harvesting and communication systems, as shown in Fig. 1, utilizing thin-film circuit topologies that allow operation at or above the TFT cutoff frequency (ft) [1,2] by using inductors to 'resonate out' the effect of TFT capacitances. Measurement and modelling of current gain near and above ft is thus critical (as opposed to conventional studies of current gain below ft). In this paper we (1) show above-ft measurements for standard bottom-gate amorphous silicon (a-Si) TFTs and self-aligned bottom-gate a-Si TFTs and (2) illustrate how large TFT gate-drain capacitances lead to a slow current-gain roll-off at frequencies above ft.
AB - A key challenge for the development of high functionality thin-film large-area electronic systems is the operational frequencies achievable by Thin-Film Transistors (TFTs). These frequencies are typically limited by low transconductances and large (gate and overlap) capacitances. However, we have recently demonstrated energy-harvesting and communication systems, as shown in Fig. 1, utilizing thin-film circuit topologies that allow operation at or above the TFT cutoff frequency (ft) [1,2] by using inductors to 'resonate out' the effect of TFT capacitances. Measurement and modelling of current gain near and above ft is thus critical (as opposed to conventional studies of current gain below ft). In this paper we (1) show above-ft measurements for standard bottom-gate amorphous silicon (a-Si) TFTs and self-aligned bottom-gate a-Si TFTs and (2) illustrate how large TFT gate-drain capacitances lead to a slow current-gain roll-off at frequencies above ft.
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U2 - 10.1109/DRC.2014.6872403
DO - 10.1109/DRC.2014.6872403
M3 - Conference contribution
AN - SCOPUS:84906535994
SN - 9781479954056
T3 - Device Research Conference - Conference Digest, DRC
SP - 273
EP - 274
BT - 72nd Device Research Conference, DRC 2014 - Conference Digest
PB - Institute of Electrical and Electronics Engineers Inc.
T2 - 72nd Device Research Conference, DRC 2014
Y2 - 22 June 2014 through 25 June 2014
ER -