Computer architecture techniques for power-efficiency

Stefanos Kaxiras, Margaret Rose Martonosi

Research output: Chapter in Book/Report/Conference proceedingChapter

39 Scopus citations

Abstract

In the last few years, power dissipation has become an important design constraint, on par with performance, in the design of new computer systems. Whereas in the past, the primary job of the computer architect was to translate improvements in operating frequency and transistor count into performance, now power efficiency must be taken into account at every step of the design process. While for some time, architects have been successful in delivering 40% to 50% annual improvement in processor performance, costs that were previously brushed aside eventually caught up. The most critical of these costs is the inexorable increase in power dissipation and power density in processors. Power dissipation issues have catalyzed new topic areas in computer architecture, resulting in a substantial body of work on more power-efficient architectures. Power dissipation coupled with diminishing performance gains, was also the main cause for the switch from single-core to multi-core architectures and a slowdown in frequency increase. This book aims to document some of the most important architectural techniques that were invented, proposed, and applied to reduce both dynamic power and static power dissipation in processors and memory hierarchies. A significant number of techniques have been proposed for a wide range of situations and this book synthesizes those techniques by focusing on their common characteristics.

Original languageEnglish (US)
Title of host publicationSynthesis Lectures on Computer Architecture
Pages1-218
Number of pages218
DOIs
StatePublished - Jan 1 2008

Publication series

NameSynthesis Lectures on Computer Architecture
Volume4
ISSN (Print)1935-3235
ISSN (Electronic)1935-3243

All Science Journal Classification (ASJC) codes

  • Hardware and Architecture

Keywords

  • Computer architecture
  • Computer energy consumption
  • Computer hardware
  • Computer power consumption
  • Computer power efficiency
  • Dynamic power
  • Dynamic voltage/frequency scaling
  • Leakage power
  • Low power computer design
  • Static power

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  • Cite this

    Kaxiras, S., & Martonosi, M. R. (2008). Computer architecture techniques for power-efficiency. In Synthesis Lectures on Computer Architecture (pp. 1-218). (Synthesis Lectures on Computer Architecture; Vol. 4). https://doi.org/10.2200/S00119ED1V01Y200805CAC004