Abstract
One can effectively utilize predicated execution to improve branch handling in instruction-level parallel processors. Although the potential benefits of predicated execution are high, the tradeoffs involved in the design of an instruction set to support predicated execution can be difficult. On one end of the design spectrum, architectural support for full predicated execution requires increasing the number of source operands for all instructions. Full predicate support provides for the most flexibility and the largest potential performance improvements. On the other end, partial predicated execution support, such as conditional moves, requires very little change to existing architectures. This paper presents a preliminary study to qualitatively and quantitatively address the benefit of full and partial predicated execution support. With our current compiler technology, we show that the compiler can use both partial and full predication to achieve speedup in large control-intensive programs. Some details of the code generation techniques are shown to provide insight into the benefit of going from partial to full predication. Preliminary experimental results are very encouraging: partial predication provides an average of 33% performance improvement for an 8-issue processor with no predicate support while full predication provides an additional 33% improvement.
Original language | English (US) |
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Pages | 138-149 |
Number of pages | 12 |
State | Published - Jan 1 1995 |
Externally published | Yes |
Event | Proceedings of the 22nd Annual International Symposium on Computer Architecture - Santa Margherita Ligure, Italy Duration: Jun 22 1995 → Jun 24 1995 |
Other
Other | Proceedings of the 22nd Annual International Symposium on Computer Architecture |
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City | Santa Margherita Ligure, Italy |
Period | 6/22/95 → 6/24/95 |
All Science Journal Classification (ASJC) codes
- Engineering(all)