@inproceedings{41a13bba78714f2b99a763c1e652c3fd,
title = "CIFER: A 12nm, 16mm2, 22-Core SoC with a 1541 LUT6/mm21.92 MOPS/LUT, Fully Synthesizable, CacheCoherent, Embedded FPGA",
abstract = "Embedded FPGAs (eFPGA) are increasingly being used in SoCs, enabling post-silicon hardware specialization. Existing CPU-eFPGA SoCs have three deficiencies. First, their low core count hinders efficient execution of thread-level-parallel workloads. Second, noncoherent or partially coherent CPU-eFPGA integration inhibits dynamic, random memory sharing. Third, the use of full-custom circuits makes proprietary eFPGAs technology-dependent, inflexible in physical layout, and lacking architectural customizability.",
author = "Chang, {Ting Jung} and Ang Li and Fei Gao and Tuan Ta and Georgios Tziantzioulis and Yanghui Ou and Moyang Wang and Jinzheng Tu and Kaifeng Xu and Jackson, {Paul J.} and August Ning and Grigory Chirkov and Marcelo Orenes-Vera and Shady Agwa and Xiaoyu Yan and Eric Tang and Jonathan Balkind and Christopher Batten and David Wentzlaff",
note = "Publisher Copyright: {\textcopyright} 2023 IEEE.; 44th Annual IEEE Custom Integrated Circuits Conference, CICC 2023 ; Conference date: 23-04-2023 Through 26-04-2023",
year = "2023",
doi = "10.1109/CICC57935.2023.10121294",
language = "English (US)",
series = "Proceedings of the Custom Integrated Circuits Conference",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
booktitle = "2023 IEEE Custom Integrated Circuits Conference, CICC 2023 - Proceedings",
address = "United States",
}