Cache coherence for shared memory multiprocessors based on virtual memory support

K. Petersen, Kai Li

Research output: Chapter in Book/Report/Conference proceedingConference contribution

4 Scopus citations

Abstract

This paper presents a software cache coherence scheme that uses virtual memory (VM) support to maintain cache coherency for shared memory multiprocessors. Traditional VM translation hardware in each processor is used to detect memory access attempts that would violate cache coherence and system software is used to enforce coherence. The implementation of this class of coherence schemes is very economical: it requires neither special multiprocessor hardware nor compiler support, and easily incorporates different consistency models. The authors evaluated two consistency models for the VM-based approach: sequential consistency and lazy release consistency. The VM-based schemes are compared with a bus based snoopy caching architecture, and the authors' trace-driven simulation results show that the VM-based cache coherence schemes are practical for small-scale, shared memory multiprocessors.

Original languageEnglish (US)
Title of host publicationProceedings of 7th International Parallel Processing Symposium, IPPS 1993
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages49-55
Number of pages7
ISBN (Electronic)0818634421, 9780818634420
DOIs
StatePublished - Jan 1 1993
Event7th International Parallel Processing Symposium, IPPS 1993 - Newport, United States
Duration: Apr 13 1993Apr 16 1993

Publication series

NameProceedings of 7th International Parallel Processing Symposium, IPPS 1993

Conference

Conference7th International Parallel Processing Symposium, IPPS 1993
CountryUnited States
CityNewport
Period4/13/934/16/93

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Hardware and Architecture
  • Software
  • Computational Theory and Mathematics
  • Computer Networks and Communications

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