TY - GEN
T1 - Butterfly and inverse butterfly nets integration on Altera NIOS-II embedded processor
AU - Cardarilli, G. C.
AU - Di Nunzio, L.
AU - Fazzolari, R.
AU - Re, M.
AU - Lee, Ruby B.
N1 - Copyright:
Copyright 2011 Elsevier B.V., All rights reserved.
PY - 2010
Y1 - 2010
N2 - The Instruction Set Architecure (ISA) of micro-processors is usually word oriented, so it is not optimized to perform bit level operations. A functional unit oriented to the bit manipulation could accelerate the computation increasing the microprocessor performance in terms of execution time. This work presents the experimental results of the integration between the Bit Manipulation Unit (BMU) described in [1], [2] and the Altera NIOS-II processor [5]. The BMU, described in VHDL, has been integrated in the processor using the Custom Logic feature [6] and implemented on an Altera-Stratix FPGA.
AB - The Instruction Set Architecure (ISA) of micro-processors is usually word oriented, so it is not optimized to perform bit level operations. A functional unit oriented to the bit manipulation could accelerate the computation increasing the microprocessor performance in terms of execution time. This work presents the experimental results of the integration between the Bit Manipulation Unit (BMU) described in [1], [2] and the Altera NIOS-II processor [5]. The BMU, described in VHDL, has been integrated in the processor using the Custom Logic feature [6] and implemented on an Altera-Stratix FPGA.
UR - http://www.scopus.com/inward/record.url?scp=79957987491&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=79957987491&partnerID=8YFLogxK
U2 - 10.1109/ACSSC.2010.5757737
DO - 10.1109/ACSSC.2010.5757737
M3 - Conference contribution
AN - SCOPUS:79957987491
SN - 9781424497218
T3 - Conference Record - Asilomar Conference on Signals, Systems and Computers
SP - 1279
EP - 1283
BT - Conference Record of the 44th Asilomar Conference on Signals, Systems and Computers, Asilomar 2010
T2 - 44th Asilomar Conference on Signals, Systems and Computers, Asilomar 2010
Y2 - 7 November 2010 through 10 November 2010
ER -