Abstract
A technique for factoring Boolean expressions which extends standard factorization algorithms by utilizing Boolean and topological information directly during the factorization process is presented. A representation for Boolean functions is introduced, and efficient algorithms for constructing this representation are given. Examples of the techniques are given, and the results of experiments using these methods to factor functions from the MCNC logic synthesis benchmark set are reported. Preliminary experimental results show improvements of up to 20% in literal count compared to MISII algebraic factoring.
Original language | English (US) |
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Pages (from-to) | 2646-2649 |
Number of pages | 4 |
Journal | Proceedings - IEEE International Symposium on Circuits and Systems |
Volume | 4 |
State | Published - Dec 1 1990 |
Externally published | Yes |
Event | 1990 IEEE International Symposium on Circuits and Systems Part 4 (of 4) - New Orleans, LA, USA Duration: May 1 1990 → May 3 1990 |
All Science Journal Classification (ASJC) codes
- Electrical and Electronic Engineering