An Optoelectronic Processor/Interconnection Employing Smart Logic and Routing Pixel Arrays

S. Yu; S. R. Forrest; P. R. Prucnal

doi:10.1109/68.185070

An Optoelectronic Processor/Interconnection Employing Smart Logic and Routing Pixel Arrays

S. Yu, S. R. Forrest, P. R. Prucnal

Research output: Contribution to journal › Article › peer-review

1 Scopus citations

Abstract

We describe an optoelectronic processor/interconnection based on two multifunctional integrated optoelectronic smart pixel arrays which can be used to solve a large class of calculational and routing problems. The novel smart pixel technology is based on a circuit which can be dynamically configured to perform a complete Boolean logic set or routing bypass/exchange operations. System control and performance characteristics are calculated based on demonstrated performance of smart pixels similar to those described here.

Original language	English (US)
Pages (from-to)	89-92
Number of pages	4
Journal	IEEE Photonics Technology Letters
Volume	5
Issue number	1
DOIs	https://doi.org/10.1109/68.185070
State	Published - Jan 1993

All Science Journal Classification (ASJC) codes

Electronic, Optical and Magnetic Materials
Atomic and Molecular Physics, and Optics
Electrical and Electronic Engineering

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10.1109/68.185070

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title = "An Optoelectronic Processor/Interconnection Employing Smart Logic and Routing Pixel Arrays",

abstract = "We describe an optoelectronic processor/interconnection based on two multifunctional integrated optoelectronic smart pixel arrays which can be used to solve a large class of calculational and routing problems. The novel smart pixel technology is based on a circuit which can be dynamically configured to perform a complete Boolean logic set or routing bypass/exchange operations. System control and performance characteristics are calculated based on demonstrated performance of smart pixels similar to those described here.",

author = "S. Yu and Forrest, \{S. R.\} and Prucnal, \{P. R.\}",

note = "Funding Information: Manuscript received July 16, 1992; revised Octobcr 13, 19Y2. This work was supported by a National Science Foundation Grant and contracts from DARPA/RADC and Siemens Research Center. The authors are with the Advanced Technology Center for Photonics and Optoelectronic Materials (ATC/POEM), Department of Electrical Engineering, Princeton University, Princeton, NJ 08544. IEEE Log Number 9206048.",

year = "1993",

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doi = "10.1109/68.185070",

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publisher = "Institute of Electrical and Electronics Engineers Inc.",

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AU - Prucnal, P. R.

N1 - Funding Information: Manuscript received July 16, 1992; revised Octobcr 13, 19Y2. This work was supported by a National Science Foundation Grant and contracts from DARPA/RADC and Siemens Research Center. The authors are with the Advanced Technology Center for Photonics and Optoelectronic Materials (ATC/POEM), Department of Electrical Engineering, Princeton University, Princeton, NJ 08544. IEEE Log Number 9206048.

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N2 - We describe an optoelectronic processor/interconnection based on two multifunctional integrated optoelectronic smart pixel arrays which can be used to solve a large class of calculational and routing problems. The novel smart pixel technology is based on a circuit which can be dynamically configured to perform a complete Boolean logic set or routing bypass/exchange operations. System control and performance characteristics are calculated based on demonstrated performance of smart pixels similar to those described here.

AB - We describe an optoelectronic processor/interconnection based on two multifunctional integrated optoelectronic smart pixel arrays which can be used to solve a large class of calculational and routing problems. The novel smart pixel technology is based on a circuit which can be dynamically configured to perform a complete Boolean logic set or routing bypass/exchange operations. System control and performance characteristics are calculated based on demonstrated performance of smart pixels similar to those described here.

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An Optoelectronic Processor/Interconnection Employing Smart Logic and Routing Pixel Arrays

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