AN optimum channel-routing algorithm for polycell layouts of integrated circuits

B. W. Kernighan, D. G. Schweikert, G. Persky

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

This paper presents an algorithm for finding optimum routings for interconnection paths in a channel between two parallel rows of circuit cells. The algorithm, although based on branch and bound, has provided optimum routings for circuits with 50 to 60 nets in a minute or two of computing.

Original languageEnglish (US)
Title of host publicationPapers on 25 Years of Electronic Design Automation, DAC 1988
EditorsA.R. Newton
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages57-66
Number of pages10
ISBN (Electronic)0897912675
DOIs
StatePublished - Jun 1 1988
Externally publishedYes
Event1988 ACM Design Automation Conference, DAC 1988 - Anaheim, United States
Duration: Jun 12 1988Jun 15 1988

Publication series

NameProceedings - Design Automation Conference
VolumePart F130197
ISSN (Print)0738-100X

Other

Other1988 ACM Design Automation Conference, DAC 1988
CountryUnited States
CityAnaheim
Period6/12/886/15/88

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Control and Systems Engineering
  • Electrical and Electronic Engineering
  • Modeling and Simulation

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  • Cite this

    Kernighan, B. W., Schweikert, D. G., & Persky, G. (1988). AN optimum channel-routing algorithm for polycell layouts of integrated circuits. In A. R. Newton (Ed.), Papers on 25 Years of Electronic Design Automation, DAC 1988 (pp. 57-66). (Proceedings - Design Automation Conference; Vol. Part F130197). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1145/62882.62886