TY - GEN
T1 - An architecture framework for introducing predicated execution into embedded microprocessors
AU - Connors, Daniel A.
AU - Puiatti, Jean Michel
AU - August, David I.
AU - Crozier, Kevin M.
AU - Hwu, Wen Mei W.
PY - 1999
Y1 - 1999
N2 - Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism (ILP) techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeoff in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10% performance improvement and a code reduction of 25% over a traditionally predicated architecture.
AB - Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism (ILP) techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeoff in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10% performance improvement and a code reduction of 25% over a traditionally predicated architecture.
UR - http://www.scopus.com/inward/record.url?scp=84878637073&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=84878637073&partnerID=8YFLogxK
U2 - 10.1007/3-540-48311-x_185
DO - 10.1007/3-540-48311-x_185
M3 - Conference contribution
AN - SCOPUS:84878637073
SN - 3540664432
SN - 9783540664437
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 1301
EP - 1311
BT - Euro-Par 1999 - Parallel Processing
PB - Springer Verlag
T2 - 5th International Conference on Parallel Processing, Euro-Par 1999
Y2 - 31 August 1999 through 3 September 1999
ER -