An architecture framework for introducing predicated execution into embedded microprocessors

Daniel A. Connors, Jean Michel Puiatti, David I. August, Kevin M. Crozier, Wen Mei W. Hwu

Research output: Chapter in Book/Report/Conference proceedingConference contribution

2 Scopus citations

Abstract

Growing demand for high performance in embedded systems is creating new opportunities for Instruction-Level Parallelism (ILP) techniques that are traditionally used in high performance systems. Predicated execution, an important ILP technique, can be used to improve branch handling, reduce frequently mispredicted branches, and expose multiple execution paths to hardware resources. However, there is a major tradeoff in the design of the instruction set, the addition of a predicate operand for all instructions. We propose a new architecture framework for introducing predicated execution to embedded designs. Experimental results show a 10% performance improvement and a code reduction of 25% over a traditionally predicated architecture.

Original languageEnglish (US)
Title of host publicationEuro-Par 1999 - Parallel Processing
Subtitle of host publication5th International Conference, Proceedings
PublisherSpringer Verlag
Pages1301-1311
Number of pages11
ISBN (Print)3540664432, 9783540664437
DOIs
StatePublished - 1999
Externally publishedYes
Event5th International Conference on Parallel Processing, Euro-Par 1999 - Toulouse, France
Duration: Aug 31 1999Sep 3 1999

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1685 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Other

Other5th International Conference on Parallel Processing, Euro-Par 1999
CountryFrance
CityToulouse
Period8/31/999/3/99

All Science Journal Classification (ASJC) codes

  • Theoretical Computer Science
  • Computer Science(all)

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