TY - GEN
T1 - Amorphous silicon floating-gate thin film transistor
AU - Huang, Yifei
AU - Hekmatshoar, Bahman
AU - Wagner, Sigurd
AU - Sturm, James C.
PY - 2009/12/11
Y1 - 2009/12/11
N2 - Amorphous silicon (a-Si) based memory devices have the potential to greatly expand the functionality of a-Si thin-film transistor (TFT) circuitry. Recently, an a-Si floating gate TFT (FGTFT) based memory element has been demonstrated, but the memory window was only 0.5V an d the retention time was only ∼1hour [1]. Furthermore, a-Si FGTFTs in general have a threshold voltage which depends on the drain voltage. In this work, we explore the effects of tunnel dielectric deposition condition and floating gate (FG) geometry on the performance of a-Si FGTFT. Through this analysis, we achieved a-Si FGTFTs with memory windows of >4V, room temperature retention times of >150hours and threshold voltages (VT) which are independent of the drain voltage.
AB - Amorphous silicon (a-Si) based memory devices have the potential to greatly expand the functionality of a-Si thin-film transistor (TFT) circuitry. Recently, an a-Si floating gate TFT (FGTFT) based memory element has been demonstrated, but the memory window was only 0.5V an d the retention time was only ∼1hour [1]. Furthermore, a-Si FGTFTs in general have a threshold voltage which depends on the drain voltage. In this work, we explore the effects of tunnel dielectric deposition condition and floating gate (FG) geometry on the performance of a-Si FGTFT. Through this analysis, we achieved a-Si FGTFTs with memory windows of >4V, room temperature retention times of >150hours and threshold voltages (VT) which are independent of the drain voltage.
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U2 - 10.1109/DRC.2009.5354877
DO - 10.1109/DRC.2009.5354877
M3 - Conference contribution
AN - SCOPUS:76549135935
SN - 9781424435289
T3 - Device Research Conference - Conference Digest, DRC
SP - 135
EP - 136
BT - 67th Device Research Conference, DRC 2009
T2 - 67th Device Research Conference, DRC 2009
Y2 - 22 June 2009 through 24 June 2009
ER -