Algorithm-based fault tolerance for FFT networks

Sying Jyan Wang, Niraj K. Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution

11 Scopus citations

Abstract

Algorithm-based fault tolerance (ABFT) is a low-overhead technique for incorporating fault tolerance into multiprocessor architectures. Many ABFT schemes have been proposed in (he past for fast Fourier transform (FFT) networks. In this paper, a new ABFT scheme for FFT networks is proposed. We show that the new approach maintains the high throughput of previous schemes, yet needs lower hardware overhead and achieves higher fault coverage than previous schemes by Jou et al and Tao et al.

Original languageEnglish (US)
Title of host publication1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages141-144
Number of pages4
ISBN (Electronic)0780305930
DOIs
StatePublished - Jan 1 1992
Event1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 - San Diego, United States
Duration: May 10 1992May 13 1992

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume1
ISSN (Print)0271-4310

Conference

Conference1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992
CountryUnited States
CitySan Diego
Period5/10/925/13/92

All Science Journal Classification (ASJC) codes

  • Electrical and Electronic Engineering

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    Wang, S. J., & Jha, N. K. (1992). Algorithm-based fault tolerance for FFT networks. In 1992 IEEE International Symposium on Circuits and Systems, ISCAS 1992 (pp. 141-144). [229994] (Proceedings - IEEE International Symposium on Circuits and Systems; Vol. 1). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/ISCAS.1992.229994