A totally self-checking checker for a parallel unordered coding scheme

S. W. Burns, N. K. Jha

Research output: Chapter in Book/Report/Conference proceedingConference contribution


Bose has developed a parallel unordered coding scheme using only r checkbits for 2r information bits. This code can detect all unidirectional errors and requires simple parallel encoding/decoding. The information symbols can be separated from the check symbols. However, the information symbols containing all-0's and all-1's need to be transformed to two other information symbols. This allows one to reduce the number of checkbits over Berger code by 1. Since information symbols containing a power-of-two number of bits are quite common, this coding scheme should become quite popular. In this paper, a modular, economical and easily testable totally self-checking (TSC) checker design for the above code is described. The TSC concept is well-known for providing concurrent error detection of transient as well as permanent faults. The design is self-testing with at most only 2r+16 codeword tests. This means that if k is the number of information bits, the size of the codeword test is only O(log2k). This is the first known TSC checker design for this code.

Original languageEnglish (US)
Title of host publicationDigest of Papers - 1992 IEEE VLSI Test Symposium, VLSI 1992
PublisherIEEE Computer Society
Number of pages6
ISBN (Electronic)0780306236
StatePublished - 1992
Event1992 IEEE VLSI Test Symposium, VLSI 1992 - Atlantic City, United States
Duration: Apr 7 1992Apr 9 1992

Publication series

NameProceedings of the IEEE VLSI Test Symposium


Conference1992 IEEE VLSI Test Symposium, VLSI 1992
Country/TerritoryUnited States
CityAtlantic City

All Science Journal Classification (ASJC) codes

  • Computer Science Applications
  • Electrical and Electronic Engineering


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